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  www.vishay.com 41 APD-240G064 vishay dale document number: 37046 revision 21-dec-00 plasma panel display modules 240 x 64 graphics display with ascii input controller, dc/dc converter and drive circuitry the APD-240G064 is a dot matrix graphic display with an array of 240 x 64 pixels available. the module is composed of a highly reliable dc plasma display, ascii input graphics control- ler, dc converter and drive circuitry which are assembled to form a rugged, slim profile display sub-system. interface to the APD-240G064 is through a parallel or serial inter- face. the interface allows for efficient handshaking and flow of bi-directional data. vishay dale's patented open construction display technology assures a stable, flicker free screen. features 240 x 64 pixel array for bright and vivid graphics parallel interface or rs-232 serial interface powerful software commands make display integration simple and efficient + 5 to + 24vdc display voltage electrostatic caution vishay dale display panels use electrostatic sensitive components. these assemblies should be unpacked and handled in an esd controlled area only. when shipping use packing materials designed for protection of electrostatic sensitive components. vishay dale believes that the information described in this publication is accurate and reliable, and much care has been taken in its preparation. however, no responsibility, financial or otherwise, is accepted for any consequences arising out of the use of th is information. this information is subject to change without notice. optical specifications pixel size: .019" [.483mm] pixel array: 240 x 64 luminance: 50 foot lamberts typical color: neon orange. refresh cycle: 65hz viewing angle: 150 cone contrast ratio: 30:1 environmental specifications operating temperature: 0 c to - 70 c storage temperature: - 20 c to - 85 c operating humidity: 95% rh non-condensing mechanical shock: 30g vibration: 0.018" [.457mm] displacement amplitude from 10-50hz, 2g acceleration from 50 to 2000hz logarithmic sweep rate mean time between failure: 50,000 hours standard electrical specifications description panel supply voltage panel supply current symbol vdc idc* min. 5 typ. 12.0 1.25 max. 24 2.50** units v a dimensions in inches mounting holes .172 dia. 4 places .200 4.330 3.780 .275 1.610 7.409 1.267 1.814 10.230 see character detail 'a' .0285 .019 sq. typ. .031 .325 max. 1.3 max. detail a matrix note: *at 12v **at start-up
document number: 37046 revision 21-dec-00 www.vishay.com 42 APD-240G064 vishay dale parallel interface j2, parallel data connector. mates with 3m tyco amp 746285-6, 26 pin, idc connector. note: par should be jumper selected on jumper block w1 for proper parallel interface operation. *note: the maximum vdc draw denotes a power up condition when the dc converter starts. typical duration is 15-30 ms. *unit may be powered from + 5v to + 24v. contact factory for current draw at voltages other than + 12v and pin connection j2. + 12v 0.6v 2.5a max.*, 1.25 a typ . vdc power supply: (recommended) connector j1 pin 1 2 3 4 signal + 12 v ground ground reserved mates to tyco amp *1-480424-0 housing (1 rqr.) *350689-1 socket pins (4 rqr.) power supply connection note: input load is one 74 hct type input with 4.7k to v cc . outputs are 74 hc type. once data write is complete, busy signal is output. busy signal = "1" during data disposition and while the communication buffer is full. data write: when wr changes from "0" to "1" while us = "0" and rd = "1", data is latched. data read: when rd = "0" while us = "0". wr = "1", and dp = "1", data may be read by the host. power up condition immediately upon power up the following is set: the module is in the text mode. the screen will have a message printed as follows: ram ok rom ok mm-dd-yy this message indicates the hardware test has passed successfully. the "mm-dd-yy" indicates the date the firm- ware was released. input/output timing diagram, j2 logic level: l = 0.0 v minimum to 0.8 v maximum. h = 2.2 v minimum to 5.0 v maximum.. x = don't care. dp x h x rd h l x wr _| h x us l l h function write character or control code. read data from display while low. input/output inhibited. bu l x x parallel interface pin 1, 3, 5, 7, 9, 11, 13, 15 17 21 6, 8, 12, 14, 16, 18, 20, 22 23 19 25 4 24 2, 26 10 description data written to and read from the display unit through an 8 bit bi-directional data bus. write data on low to high transmit. read data while low. not connected. reset display to power-up condition when low, operate while high. read and write commands only influence display while us is low. blank display while bl is low but maintain cursor and data. display at full brightness when high or half brightness when low. when busy is high, no further data or commands should be given. common to both power supply input and host data interface . data is ready to be read when the data present signal is high. function d0-d7 (data bus) (input/output) write (wr) (input) read (rd) (input) n/c reset (input) us (unit select) (input) blank (bl) (input) bright/dim (input) (busy (bu) (output) ground data present (dp) (output) power up reset cycle on display module takes approxi- mately 250 ms to complete. it is suggested the user wait for that time period to elapse before entering data.
www.vishay.com 43 APD-240G064 vishay dale document number: 37046 revision 21-dec-00 interfacing w1 jumper shunt 1 pair of pins only on jumper w1 to select serial interface baud rate, parallel interface operation, or self-test functions. shunt both opt 1 and stest to run demo. w2 jumper the w2 jumper selects the serial handshake busy line from the host computer to the display for control of data flow from the display. on jumper w2, select "cts" for host rts to display cts handshaking, or "dsr" for host dtr to display dsr handshaking. selection does not affect parallel interface operation. 1.2 2.4 4.8 9.6 19.2 opt 1 par s test selects 1200 baud 2400 baud 4800 baud 9600 baud (factory setting) 19200 baud self-test demo parallel interface operation graphics self-test demo selects host dtr to display dsr handshaking host rts to display cts handshaking (factory setting) dsr cts serial interface pin connections display connector j3 description rxd rts txd cts dtr gnd db-25 3 4 2 5 20 7 db-9 2 7 3 8 4 5 10-pin 1 2 3 4 5 6 7 8 9 10 db-9 1 6 2 7 3 8 4 9 5 description n/c (reserved) n/c (reserved) txd (output) cts (input) rxd (input) rts (output) dsr (input) n/c (reserved) gnd n/c (reserved) host connection serial interface j3, serial interface connector . serial interface, mates with tyco amp 10-pin idc type 746285 -1 or equivalent. female db-9 connector option available. the baud rate is jumper selected at jumper block w1 for 1200, 2400, 4800, 9600 or 19.2k baud.
document number: 37046 revision 21-dec-00 www.vishay.com 44 APD-240G064 vishay dale command set, text mode (software instructions) the ascii control code characters from 00h to 1fh are reserved by the controller for the command interpreter. a brief listing of the available commands and their description follows. note: *indicates power up default. hex code 00-07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f text functions no function. back space cursor: moves the cursor 1 column to the left in the current row. if the cursor is at the 1st column it will move to the end of the previous line. horizontal tab: moves the cursor 1 column to the right. will wrap around at the end of the screen. if mode is set to scroll, the screen will scroll up one line at the last character position of the last row, if not in scroll mode, the cursor will wrap to the home position. line feed: moves cursor down one row while remaining in same column position. if mode is set to scroll, and the cursor is at bottom row of screen, the screen will move (scroll) up 1 row and bottom row will be cleared (filled with spaces), when line feed is invoked. if not in scroll mode the cursor will wrap to the first row. vertical tab: moves cursor up one row while remaining in the same column position. the cursor will wrap to the bottom row after the top row. clear screen: fill the screen with blank characters, cursor moves to home position. carriage return: moves cursor to the first column of the present row. home cursor: moves cursor to the 1st character position of the 1st row, the home position. no operation. no operation. position cursor: moves cursor to a specified column, row address depending upon next 2 bytes sent. the format is column, row. select cursor: following byte selects cursor style * 01 = blinking underbar 02 = non-blinking underbar 03 = blinking block 04 = cursor not visible no operation. select character font: following byte selects one of 4 character generator fonts: * 00 = ascii, standard and inverse 01 = international 02 = international and katakana 03 = international and cyrillic set 8th data bit to logic "1". this is a useful command for programmers who want to mix characters from both top and bottom of character set without calculating offsets. (for example, using reverse video with the default font.) no operation. no operation. no operation. set 8th data bit to logic "0". this disables the previous command (15h). reserved, do not use. see escape control codes. set to scroll mode: sets the display mode so that whenever the cursor reaches the last position in the last column or a line feed occurs while cursor is on last row, the screen will scroll up one row. the top row of data will be lost and the bottom row of the display will be spaces. set to auto wrap mode: in this mode, the cursor will automatically wrap around to the next row. when the last character position on the screen is reached, the cursor will return to home position. blank display: the display is blanked, but display memory is maintained and new data can be entered. unblank display: the display is restored/turned to active state. number of bytes 1 1 1 1 1 1 1 1 3 2 2 1 1* 1 1* 1 1*
www.vishay.com 45 APD-240G064 vishay dale document number: 37046 revision 21-dec-00 command set, graphic mode (software instructions) cursor location - all cursor locations are based upon pixel location - not - character column and row locations. the upper left hand corner is 000,000 (x, y) while the lower right hand corner is 239, 063 (x, y). the cursor auto-increments based upon the character font size by the width of the font. the cursor is not visible in graphic mode. write logic - within most commands, the write logic byte must be included: 0 = set pixels (turn-on foreground pixels) 1 = xor pixels (invert foreground pixels) 2 = reset pixels (turn-off foreground pixels) 3 = overwrite (turn-on foreground and turn-off background pixels, image load and graphic text commands only) font size the font size must be written before text is written. there are three standard fonts included in the graphics mode: 1 = font 1, a 4 x 5 character in a 5 x 6 block 2 = font 2, a 5 x 7 character in a 6 x 8 block 3 = font 3, a 10 x 14 character in a 12 x 16 block refer to character set tables for supported characters and fonts. note: the logic byte and font byte are sent in ascii format. data format all addresses must be sent in ascii format. column and row positions begin at the upper left hand corner at address 000,000 (x, y). a pixel address consists of a column address followed by row address. addresses are sent to the panel as a three character ascii sequence for column (x) followed by a three character ascii sequence for row (y). an example is the upper left hand pixel is 000,000 while the lower right hand corner is 239, 063. note: spaces are shown in the graphic sequences only for clarity and must not occur in the actual commands transmitted to the panel. graphic functions graphic functions clear screen: this command will clear the graphic screen to all pixels off (logic 0). esc c text write: logic byte (l), font byte (f), x, y starting address, ascii text. wrap around will occur. esc b l f xxx yyy aaaa..aaaa esc \ set pixel command: logic byte (l), x, y pixel address, end of data delimiter. esc d l xxx yyy esc \ (single pixel) esc d l xxx yyy xxx yyy .......esc \ (continous) set graphics mode: esc g draw ellipse: logic byte, major axis intercept offset, minor axis intercept offset (axis's intercept offset is measured in pixels from the center point), x, y center point, from angle theta (t), in degrees, to phi (p). a complete rotation would be f rom 001 to 360. esc h l mmm www xxx yyy ttt ppp write graphic image: logic byte 1, y1 (upper left hand corner), 2, y2 (width and height), data. esc i l xxx yyy xxx yyy ddd .... x1 start coordinate and x2 width must both be multiples of 8. the number of data bytes transmitted must be equal to (x2 width / 8)* y2 height. the first data byte transmitted will map into the 8 pixels on the top line in the upper left hand corne r of the image with the least significant bit at the left and the most significant bit at the right. successive bytes will write to the next byte to the right. when all bytes are written for this line, the next byte will map into the left most byte of the next l ine down. graphical representation of each data byte: lsb x x x x x x msb hex code 1b, 42 1b, 43 1b, 44 1b, 46 set text mode: esc f 1b, 47 1b, 48 1b, 49
document number: 37046 revision 21-dec-00 www.vishay.com 46 APD-240G064 vishay dale hex code 1b, 49 (cont.) 1b, 4a 1b, 4b 1b, 4c 1b, 4d 1b, 4e 1b, 4f 1b, 50 graphic software commands (continued) graphic functions load graphic image: (continued) graphical representation of data array: data 0 data 1 ? ? ? data (width/8) data (width/8 + 1) ? ? ? data (2 * width/8) data (2 * width/8 + 1) ? ? ? ? ? ? data (n * width/8) data (n * width/8 + 1) ? ? ? ? ? ? data (height-1) ? width/8) ? ? ? data (height) * (width/8) - 1 draw box: logic byte, x1, y1 (upper left hand corner). x2, y2 (lower right hand corner). esc j l xxx yyy xxx yyy draw line: logic byte, x1, y1 (beginning of line), x2, y2 (end of line), data delimiter. (for single lines) esc k l xxx yyy xxx yyy esc \ (for continuous lines) esc k m xxx yyy xxx yyy ????? xxx yyy esc \ fill region: logic byte, x1, y1 (upper left corner), x2, y2 (lower right hand corner). esc l l xxx yyy xxx yyy read graphic image: x1, y1 (upper left hand corner), x2, y2 (width and height) esc m xxx yyy xxx yyy graphic image information is returned by the display after receipt of this command. x1 start coordinate and x2 width must both be multiples of 8. refer to write graphic image command for format of data sent by display. set display page: p esc n p sets the active display page of video ram which is visible on the display. two pages p are available, 0 - 1 (ascii representation). default is page 0, supported in graphics mode only. set write page: p esc o p sets the active read/write page of video ram on which all following commands operate. two pages p are available, 0 - 1 (ascii representation). default is page 0, supported in graphics mode only. combine pages: logic byte, p1 (source page 1), p2 (source page 2), p3 (destination page). esc p l p p p combines graphic information on source pages using logic write modes 0, 1 or 2 and places that information on the destination page. use only with pages containing graphic information.
www.vishay.com 47 APD-240G064 vishay dale document number: 37046 revision 21-dec-00 character fonts 0 1 2 3 4 5 6 7 8 9 a b c d e f upper nibble d7 - d4 lower nibble d3 - d0 ascii, standard and inverse character set, 0 - text mode 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f lower nibble d3 - d0 0 1 2 3 4 5 6 7 8 9 a b c d e f upper nibble d7 - d4 international character set, 1 - text mode
document number: 37046 revision 21-dec-00 www.vishay.com 48 APD-240G064 vishay dale character fonts international and katakana character set, 2 - text mode upper nibble d7 - d4 lower nibble d3 - d0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f international and cyrillic character set, 3 - text mode upper nibble d7 - d4 lower nibble d3 - d0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f
www.vishay.com 49 APD-240G064 vishay dale document number: 37046 revision 21-dec-00 character fonts lower nibble d3 - d0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f upper nibble d7 - d4 graphic font 1 graphic font 2 0 1 2 3 4 5 6 7 8 9 a b c d e f upper nibble d7 - d4 0 1 2 3 4 5 6 7 8 9 a b c d e f lower nibble d3 - d0
document number: 37046 revision 21-dec-00 www.vishay.com 50 APD-240G064 vishay dale ordering information standard warranty is 1 year parts and labor. description p art number display unit.................................................................................................................. . .................................................. APD-240G064 j1, power connector kit.............................................................................................. .......... .......................................... 280108-05 j2, data connector kit (parallel interface, 26 pin idc)........................................................................ ........................ . 280105-01 j3, data connector kit (serial interface, 10 pin idc) .......................................................................... ............................. 280105-02 non-glare filter (amber cp)....................................................................................... ............. ....................................... 280109-12 character fonts graphic font 3 upper nibble d7 - d4 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f lower nibble d3 - d0 ? 0 *


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